| Access Time |
|
The average time interval between a storage peripheral (usually a disk drive or semiconductor memory) receiving a request to read or write a certain location and returning the value read or completing the write. |
| Advanced Graphics Port |
|
The advanced graphics port (AGP) bus allows the graphics controller to directly access texture map data from the main memory rather than having to move it to the graphic controllers' local memory first. This helps the system increase the speed of processing graphics and allows for a use of a larger portion of memory by "borrowing" storage for texture maps from main memory. |
| AGP |
|
See Advanced Graphics Port |
| Array |
|
The area of the RAM that stores the bits. The array consists of rows and columns, with a cell at each intersection that can store a bit. |
| Asynchronous Memory |
|
Memory that is not synchronized with the system clock. EDO and FPM are examples of asynchronous memory. |
| Auto Precharge |
|
A synchronous DRAM feature that allows the memory chip's circuitry to close a page automatically at the end of a burst. |
| Ball Grid Array |
|
A type of memory chip with solder balls on the underside for mounting. Use of BGA allows die package size to be reduced because there is more surface area for attachment. Smaller packaging allows more components to be mounted on a module, making greater densities available. The smaller package also improves heat dissipation for better performance. See CSP and FBGA. |
| Bandwidth |
|
A measure of the capacity of data that can be moved between two points in a given period of time. |
| Bank |
|
1. A slot or group of slots that must be populated with modules of like capacity in order to fulfill the data width requirement of the CPU
2. A segment of memory on a module, sometimes also referred to as a row. Modules are either single or dual banked
3. An internal logic segment in a memory component. For example, a 64Mb SDRAM has 4 banks. |
| BEDO |
|
Burst EDO is a variant on EDO DRAM in which read or write cycles are batched in bursts of four. Burst EDO bus speeds range from 40MHz to 66MHz, as opposed to the 33MHz bus speeds that can be accomplished using fast page mode or EDO DRAM. |
| BGA |
|
See Ball Grid Array |
| Binary |
|
Numbering system based on two digits: 0 and 1. |
| BIOS |
|
Basic input/output system. Often referred to as CMOS, the BIOS provides an interface for a computer's hardware and software. The BIOS configuration determines how your hardware is accessed. |
| Bit |
|
Binary digit. The smallest piece of data (a 1 or a 0) that a computer recognizes. |
| Block |
|
A physical unit of information in a logical record. Block size is usually expressed in bytes. |
| Block Diagram |
|
A circuit or system drawing concerned with major functions and interconnections between functions. |
| Buffered Memory |
|
A buffer isolates the memory from the controller to minimize the load on the chip set. It is typically used when the system has a high density of memory and/or when a system has more than 3 memory module sockets. |
| Burn-in |
|
The process of exercising an integrated circuit at elevated voltage and temperature. This process accelerates failures normally seen as "infant mortality" in a chip. (Those chips that would fail early during actual usage will fail during burn-in. Those that pass have a life expectancy much greater than that required for normal usage.) |
| Bus |
|
Circuitry that is used to move data |
| Byte |
|
A series of 8 bits. |
| Cache |
|
A small, fast memory holding recently accessed data, designed to speed up subsequent access to the same data. Typically used between a processor and main memory. |
| Cache Data SRAM |
|
Quick-access chip. |
| Capacitance |
|
The property of a circuit element that allows it to store an electrical charge. |
| CAS |
|
Column address strobe is the signal which tells the DRAM to accept the given address as a column address. It is used with RAS and a row address to select a bit within the DRAM. |
| CAS-B4-RAS (CBR) |
|
CAS before RAS. Column address strobe before row address strobe. A refresh technique in which the DRAM keeps track of the next row it needs to refresh. |
| Check Bits |
|
Extra data bits provided by a module to support ECC. |
| Chip Scale Package |
|
A type of ball grid array in which the package is roughly the size of the die. |
| Chip Set |
|
One or more chips on a motherboard that control the data flow between the processor, memory, and the other components of the system. |
| Clock rate |
|
The number of pulses emitted from a computer's clock in one second. It determines the rate at which logical or arithmetic gating is performed in a synchronous computer. |
| COAST |
|
Cache on a stick. Coast modules are used to upgrade a motherboard's L2 cache and Tag memory on some socket 7 and older motherboards. |
| COB |
|
Chip on board. A system in which semiconductor dice are mounted directly on a PC board and connected with bonded wires or solder bumps. The dice are usually mechanically protected with epoxy. |
| Column |
|
Part of the memory array. A bit can be stored where a column and a row intersect. |
| Compact Flash |
|
A small flash memory module. The memory chips are enclosed in a plastic case and retain data after they are removed from the system. The most common uses for these are in pagers, handheld computers, cell phones, digital cameras, and audio players. |
| Contacts |
|
See Edge Contacts |
| Continuity RIMM TM |
|
Modules that are used to fill all unused RIMM TM sockets in a system. Continuity-RIMMs do not use any active components; instead, they are used to continue the channel so that the signal can be properly terminated at the motherboard. |
| Controller |
|
One of the major units in a computer that interprets and carries out the instructions in a program. |
| CPU |
|
Central processing unit. The computer chip primarily responsible for executing instructions. |
| C-RIMM TM |
|
See Continuity RIMM TM |
| CSP |
|
See Chip Scale Package. |
| DDR |
|
Double data rate is a type of SDRAM in which data is sent on both the rising and falling edges of clock cycles in a data burst. It is usually referred to as DDR as opposed to DDR SDRAM. |
| Die |
|
An individual rectangular pattern on a wafer that contains circuitry to perform a specific function. Die are encapsulated to form the black chips that are then placed on a module. |
| DIMM |
|
Dual inline memory module. A module with signal and power pins on both sides of the board (front and back). |
| DRAM |
|
Dynamic random access memory. A type of memory component used to store information in a computer system. "Dynamic" means the DRAMs need a constant "refresh" (pulse of current through all of the memory cells) to keep the stored information. (See also RAM and SRAM.) |
| Dual Banked |
|
A memory module with two banks or rows. See Bank. |
| Dynamic |
|
Type of RAM (random access memory). To keep data in the DRAM, this data needs to be "refreshed" (recharged). The electric charge fades out of a DRAM like air seeps out of a balloon. Because of this change, it is called "dynamic." |
| ECC |
|
Error correcting code. Logic designed to detect and correct memory errors. |
| Edge Connector |
|
Metal tabs on the edge of a printed circuit board (PCB). The edge contacts are the interface between the PCB and the socket that allow the system to communicate with the memory module. |
| Edge Contacts |
|
See Edge Connector. |
| EDO |
|
Extended data out. An asynchronous DRAM operating mode that improves access times compared to fast page mode (FPM) DRAMs. |
| EEPROM |
|
Electrically erasable, programmable, read-only memory. EEPROMs differ from DRAMs in that the memory is saved even if electrical power is lost. Additionally, the memory can be erased and reprogrammed repeatedly. |
| Electrostatic Discharge (ESD) |
|
The dissipation of electricity. (In layman's terms, a "shock.") ESD can easily destroy semiconductor products, even when the discharge is to small to be felt. |
| Ethernet |
|
A local area network allowing several computers to transfer data over a communications cable. |
| FBGA |
|
Fine pitch ball grid array is a die package with a fine pitch ball arrangement on the underside of the package (larger than CSP). |
| Flash Card |
|
A small flash memory module. The memory chips are enclosed in a plastic case and retain data after they are removed from the system. The most common uses for these are in laptops, pagers, handheld computers, cell phones, digital cameras, and audio players. There are several different form factors of flash cards, including Compact Flash, SmartMedia, PCMCIA, and Small Form Factor Flash Card. |
| Flash Memory |
|
Flash memory is a non-volatile memory device that retains its data after the power is removed. |
| FPM |
|
Fast page mode - A feature used to support faster sequential access to DRAM by allowing multiple accesses to the currently open row to be made after supplying the row address just once. |
| Front Side Bus |
|
The main highway for data in a PC. It connects the processor, chip set, DRAM, and AGP socket. FSB is described in terms of its width in bits and its speed in MHz. |
| FSB |
|
See Front Side Bus. |